(Y592) | Digital Design Engineer

(Y592) | Digital Design Engineer

17 Oct
|
Texas Instruments
|
Bangalore Rural

17 Oct

Texas Instruments

Bangalore Rural

Connectivity Digital Design Job Description



The Connectivity team has pioneered the development of theConnectivity platform that offers the broadest portfolio of differentiatedwired and wireless ARM® MCUs with a single development environment thatdelivers flexible hardware, software and tool options for customers developingInternet-of-Things (IoT) applications.



The end applications include flow-meters, e-meters,smart-locks, video-doorbells, gateways, smart appliances, automotive keylessentry, smart lighting, robotic handlers, smoke-detectors, glucose-monitors,EPOS, asset-tracking, smoke-alarms, thermostats…



Did youknow?



-CC1350 is Industry’s first dual mode (<1GHz +2.4GHz) Wireless MCU.





-CC2640 is Industry’s lowest power Wireless MCUwith ~10years of battery life.



-CC3220 is Industry’s most secure Wireless (WiFi)MCU.



-You can achieve ~20kms of wireless range with CC1312powered by a coin cells battery.



Find belowthe demo of some of our existing products.



https://youtu.be/nsDVTRasoqc



You can findsome more details on the product portfolio here:



http://www.ti.com/wireless-connectivity/simplelink-solutions/overview/overview.html



What will you be doing in this role? (Responsibilities)



·Micro-architecture development andimplementation of IPs and SoC subsystems working closely withSystems/Architecture teams.



·Define and implement clocking andreset scheme, power domains, pinmuxing and other chip level aspects to supportSoC integration



·Quality checks of the implementedRTL for LINT and CDC rules and clear documentation of exceptions and waivers.



·Synthesis and timing closure ofimplemented IP along with equivalence checks.



·Provide quality documentation of IPimplementation and other deliverables post systematic reviews.



·Work closely with IP and SoCverification teams to achieve high quality IP delivery.



·Provide support to constraintdevelopment and timing closure.



·Contribute and drive quality/cycletime improvement methodologies as a part of the development process.



·Be a team player working acrossfunctional teams responsible for development of IP/SoCs from spec to silicon.



What do we expect from you? (Mini Qualifications)



·Strong RTL design experience of 5-10years with IP designs , SoC integration expected.



·Design experience with highperformance Bus Architectures, ARM CPUs and multiple power domain SoCs ispreferred.



·Must have strong multi-clock domaindesign knowledge and expertise in Clock Domain Crossing (CDC) analysis tools.



·Understanding of power intent, powerestimation and checks.



·Experience in timing constraintdevelopment at SoC level and timing analysis is preferred.



·RTL Synthesis and LEC experiencesare a must have.



Preferred Skills/ Experience



5-10 years of experience in IP Development, Low power design techniques,SoC integration and implementation.

Strong experience with Linting, CDC, Synthesis,Equivalence check and timing checker tools are required. Hands on experience ofcoding in Verilog and VHDL.





Preferred Skills/ Experience



5-10 years of experience in IP Development, Low power design techniques, SoC integration and implementation.

Strong experience with Linting, CDC, Synthesis, Equivalence check and timing checker tools are required. Hands on experience of coding in Verilog and VHDL.

The original job offer can be found in Kit Job:
https://www.kitjob.in/job/19571210/y592-digital-design-engineer-bangalore-rural/?utm_source=html

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