Job Attributes Job Id 10996
Req Id I316-20
Job Type Full-time
Education Level Bachelor's Degree
Job Level Experienced (Non-Manager)
Hires Needed 1
Job Location Hyderabad, Andhra Pradesh
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Senior Engineer I - Design
Hyderabad, Andhra Pradesh
Design and architect Smart Embedded Vision application designs for FPGA
The position is for the MCHP FPGA division, Hyderabad
ESSENTIAL DUTIES & RESPONSIBILITIES
Develop and test FPGA based designs for Smart embedded vision applications
Participate in testing and documenting the Designs and IPs developed within the team
Simulate the I/O pads to guarantee data sheet functionality and timing.
Interface with and support applications, product and test engineering, marketing, development systems, technology development, CAD, layout and other design organizations.
Validate and debug silicon products in support of Release to Production.
Will work closely with Digital Design Team on implementation details.
Lead and grow a team, to plan, prepare for and perform pre-silicon design and verification.
KNOWLEDGE AND SKILLS
Significant experience with VHDL and Verilog coding for FPGAs
Knowledge in device physics, low power and high speed design techniques are essential.
Knowledge of Timing analysis and timing closure
Knowledge of a scripting language (ie. TCL, PERL, etc)
Excellent technical, verbal and interpersonal skills are required.
Ability and willingness to work on multiple projects and technologies at any given time.
Exposure to analog subcircuits (ie Voltage Reg, PLL, etc)
EDUCATION AND/OR WORK EXPERIENCE
BSEE (MSEE strongly preferred) and minimum of 10 years of industry experience.
To perform this job successfully, an individual must be able to perform each essential duty satisfactorily. The requirements listed above are representative of the knowledge, skill and/or ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions of the job.
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