Lead/Staff DFT engineer - (EKV524)

Lead/Staff DFT engineer - (EKV524)

30 Jun
Analog Devices India Pvt Ltd
Bangalore Rural

30 Jun

Analog Devices India Pvt Ltd

Bangalore Rural

Job Description

Responsibilities DFT architecture definition Understand SoC architecture and test requirements

Work very closely with the lead Product/Test engineering throughout the DFT definition phase to determine efficient ways to optimize test cost and achieve high test coverage.

Drive DFT architecture SCAN scan partition, compression, at-speed, IR and low power

MBIST for memories

JTAG boundary scan insertion

Implementation Develop / Upgrade SCAN & MBIST Insertion flows

Develop appropriate timing constraints for SCAN/MBIST modes and debug timing violations

ATPG flow implementation catering to various fault models, test pattern generation

SCAN , MBIST & BSCAN Pattern Simulation

Solutions to test analog macros

Post-Silicon bring-up/support Work with Evaluation/Test Engineering team to bring-up patterns on ATE

Work on failure analysis as required

Work with the Operation team on test cost and yield improvement

Improve DFT methodology to be in sync with latest best practices and technology in the industry

Work closely with physical design team throughout the development cycle

Lead DFT activities by planning, delegating, monitoring of various tasks to meet project requirements


6-11 years of industry experience in DFT domain.

Must have experience in bringing atleast one or two products to successful production from architecture phase, scan implementation and simulations.

Must have hands-on experience working on post-silicon activities.

Exceptional interpersonal and communication skills are critical for working, influencing and collaborating with product development groups and CAD tool teams spread across the globe.

Scripting skills in Perl/Python/TCL and a good command over HDLs.

Candidates with exposure to deep submicron effects and low power implementation using UPF/CPF will be at an advantage. Candidates with experience using Cadence digital implementation tools Genus, Tempus would be preferred.

Prior experience of timing closure/physical design will be an added plus.

For positions requiring access to technical data, Analog Devices, Inc. have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324ba3 have to go through an export licensing review process.

Analog Devices, Inc. is an Equal Opportunity Employer Minorities/Females/Vet/Disability

Education Level:

Bachelor's Degree

Travel Required:

Yes, 10 PERCENT of the Time

Job Function:

IT Software :

Software Products & Services


Telecom, IT-Hardware/Networking


Software Engineer


Any Graduate

Employment Type:

Full Time

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