Design Software Verification (DSV) Engineer [L132]

Design Software Verification (DSV) Engineer [L132]

21 Dec
InSemi Technology Services

21 Dec

InSemi Technology Services


Job Description

Will be responsible for verification and validation of Vivado tool flow.

Uses the product as a customer would to understand strengths and areas for improvement. Performs advanced interactive testing and can assist with defining quality metrics.

Provide input to product development teams.

Qualifications Required:

0-2 yrs. with Masters / Bachelor or equivalent in the field of Electronics/Electrical Engineering from a reputed university.

PG-Diploma in VLSI from a reputed institute/university is a plus.

Technical Skills:

Proficient in RTL: VHDL/Verilog/System Verilog

Conceptual understanding of Digital Systems

Understanding of FPGA design flow and tools

FPGA Architecture knowledge

Good knowledge around all / any of following protocols / interfaces is highly preferred : SPI, IIC, PCIE, Ethernet, USB, HDMI, AXI, GTs, DDR4 (JEDEC)

Hands on debugging skills with on board as well as simulation environment

Expertise and hand-on with creating efficient automation and maintaining the high coverage regression suite to keep the quality intact.

Good Knowledge in Tcl, Python, Perl, Shell etc

The original job offer can be found in Kit Job:

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