Role: Senior Engineer – ASIC Design Verification
Location: Across India
Experience: 5 to 8 Years
WORK FROM OFFICE : Bangalore | Hyderabad |Chennai |Noida | Ahmedabad |Pune
ABOUT eInfochips (An Arrow Company):
eInfochips, an Arrow company (A $30B, NASDAQ listed (ARW); Ranked #102 on the Fortune List), is a leading global provider of product engineering and semiconductor design services. 25+ years of proven track record, with a team of over 2500+ engineers, the team has been instrumental in developing over 500+ products and 40M deployments in 140 countries. Company’s service offerings include Silicon Engineering, Embedded Engineering, Hardware Engineering & Digital Engineering services. eInfochips services 7 of the top 10 semiconductor companies and is recognized by NASSCOM, Zinnov and Gartner as a leading Semiconductor service provider.
ROLE & RESPONSIBILITIES:
An expert level with developing UVM-based SV test-benches
Highly experienced with defining block, sub-system and SOC top level test plans.
Relevant experience with one or more of PCIe, NVMe, NAND,
DDR and CPU sub-systems.
Deep understanding and knowledge of verification methodologies, flows and quality metrics
The incumbent will be responsible for executing complete verification project in the role senior engineer with hands on experience, mentoring, client communication / interactions, in-depth technical reviews, and close tracking of technical as well as management aspect
ESSENTIAL SKILLS & EXPERIENCE:
At-least 5 years of experience in System Verilog HVL.
At-least 3 year of experience in OVM/UVM/VMM/Test Harness.
Hands on experience of developing assertion, checkers, coverage and scenario creation.
Must have executed at-least 1 SoC Verification project
Experience in developing test and coverage plan, Verification setting and validation plan.
Knowledge of at least one industry standard protocols like Ethernet, PCIe, MIPI, USB or similar is required.