Skill: Post Silicon Validation
EXP: 4 to 15 Years
Location Bangalore

Have you personally developed or ported bare-metal C validation tests for SoC/Subsystem validation, not just executed tests?
Have you worked in Pre-Silicon Validation using FPGA/Emulation platforms such as HAPS, Zebu, Veloce, Palladium, or Virtual Platforms?
Have you participated in Silicon Power-On / Post-Silicon Bring-Up and debugged real silicon issues?
Can you explain the SoC architecture of a project you worked on, including CPU, memory, interconnect, clock/reset, and major subsystems?
Have you owned validation of a complete subsystem such as CPU SS, DDR SS, PCIe SS, Security SS, Memory SS, or similar?
Do you possess robust domain expertise in at least one critical domain: PCIe, DDR/LPDDR/HBM, Ethernet, USB, SerDes, Security, MIPI, UFS, NVMe, etc.?
Can you independently debug failures across HW / FW / RTL / SoC integration boundaries and provide a real example?

📌 Senior Technical Specialist (Bengaluru)
🏢 HCLTech
📍 Bengaluru