Key Responsibilities
- Design and develop compiler front-end components for Hardware Description Languages (HDL), with focus on SystemVerilog.
- Develop and maintain high-performance C/C++ code for compiler infrastructure and runtime systems.
- Improve compiler performance, scalability, and execution efficiency for large RTL designs.
- Work on RTL simulation and synthesis-related flows to enhance tool capabilities.
- Analyze, debug, and resolve complex issues in compiler and runtime systems.
- Develop reusable, modular, and maintainable software components using object-oriented design principles.
- Collaborate with global R&D; teams to define architecture, implement features, and improve product quality.
- Contribute to continuous improvement of compiler infrastructure, build systems, and development workflows.
- Participate in design reviews, code reviews, and technical discussions.
- Ensure robustness and correctness of HDL parsing, elaboration, and execution flows.

📌 Lead Software Engineer (Noida)
🏢 Cadence
📍 Noida