Design Verification Engineer 5 15 years experience Job Title Design Verification Engineer DV SoC IP Experience 5 15 years Location Bangalore About The Role We are seeking an experienced Design Verification Engineer to join our hardware ASIC SoC design team The candidate will play a critical role in ensuring that digital designs meet specification before tape-out by developing robust verification environments testbenches and test plans and driving verification closure for block and SoC level designs Key Responsibilities Develop verification plans based on design specifications and requirements Build and maintain reusable verification environments and testbenches using HDLs SystemVerilog Verilog and verification methodologies e g UVM Write and debug test cases run simulations perform functional verification corner- case testing regression runs - identify and debug design bugs Perform coverage analysis and ensure coverage targets are met work with design teams to fix verification issues Collaborate with RTL logic designers physical design teams and other stakeholders to ensure design correctness and contribute to design reviews code reviews Provide mentoring and guidance to junior verification engineers Required Qualifications Skills Bachelor s or Master s degree in Electrical Electronics Computer Engineering or related 5 to 15 years experience in IP SoC verification RTL verification or related roles Robust experience in hardware description languages SystemVerilog Verilog and verification methodologies especially UVM Good understanding of digital design principles and RTL design flows Strong debugging analytical and problem-solving skills ability to identify corner-case issues Excellent communication and collaboration skills - ability to work in cross-functional teams design verification physical implementation

📌 Design Verification Engineer (Bengaluru)
🏢 Best NanoTech
📍 Bengaluru