Job DescriptionSystem-on-Chip (SoC) Design Engineer NLocation: Bengaluru, India NExperience: 5–12 Years NRole: NDesign and implement high-performance SoC subsystems from microarchitecture to silicon. Collaborate with architecture, verification, DFT, STA, and physical design teams to deliver high-quality, PPA-optimized RTL for next-generation AI, Compute, and Networking SoCs. NResponsibilitiesn N Develop microarchitecture and RTL using Verilog/SystemVerilog. N Design datapaths, pipelines, FSMs, memory interfaces, and control logic. N Integrate SoC IPs and AMBA-based interconnects (AXI/AHB/APB). N Optimize designs for Power, Performance, and Area (PPA). N Drive RTL quality through Lint, CDC/RDC, synthesis, and debug. N Support timing closure,verification, and silicon bring-up. NnRequired Skills Nn 5–12 years of ASIC/SoC RTL Design experience. N Solid microarchitecture and RTL design expertise. N Proficiency in Verilog/SystemVerilog and ARM-based SoC architecture. N Experience with AMBA protocols, high-speed interfaces, and Synopsys Design Compiler. N Hands-on with Lint, CDC/RDC, VCS/Xcelium/Questa, and Python/Tcl/Perl scripting. N Exposure to advanced nodes (7nm/5nm/3nm) is a plus. N