We are looking for a talented and detail-oriented Design Verification Engineer to join our semiconductor engineering team. In this role, you will be responsible for verifying complex digital designs, developing robust verification environments, and ensuring high-quality silicon delivery. You will collaborate closely with design, architecture, and validation teams throughout the product development lifecycle.
Job Title: Design Verification Engineer
Location: Bangalore
Experience: 8+ years
Employment Type: Full time
Notice Period: Immediate/ 30 days -Develop and execute comprehensive verification plans based on design specifications.
-Build and maintain SystemVerilog/UVM-based verification environments.
-Develop reusable testbenches, constrained-random tests, assertions, and functional coverage.
-Debug simulation failures and identify root causes in collaboration with RTL designers.
-Perform regression analysis and drive verification closure using coverage metrics.
-Review design specifications and provide feedback to improve testability and quality.
Required
Qualifications
-Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, or a related field.
-Experience in Design Verification.
-Solid knowledge of digital design fundamentals and computer architecture.
-Hands-on experience with SystemVerilog and UVM.
-Experience writing assertions (SVA) and developing constrained-random verification environments.
-Familiarity with functional and code coverage analysis.
-Experience using industry-standard simulators such as VCS, Xcelium, or Questa.
-Solid debugging, analytical, and problem-solving skills.
-Excellent communication and teamwork abilities.
Preferred
Qualifications
-Experience with protocols such as PCIe, AXI, USB, DDR, Ethernet, or AMBA.
-Knowledge of scripting languages such as Python, Perl, or Shell.
-Experience with Formal Verification and Low Power Verification (UPF) is a plus.
-Exposure to emulation or FPGA-based verification is desirable