We need experienced engineers to work on the Physical Design & Implementation of SoCs in cutting edge technology and with complex functionality.
Skills:
3+ years of relevant experience in Block/SoC level Physical Design.
Experience in Block/SoC Physical Design in the following topics:
PnR tools like ICC2/Innovus with regards to physical/timing convergence
14nm / 10nm / 7nm / 5nm process nodes
Tapeout sign-off experience is a must using industry standard tools.
Cadence Encounter/Synopsys ICC2 tool set
SDC, STA and Equivalence checking
Flow automation exposure will be an added advantage.
Working knowledge of Unix, Linux and SKILL, Shell/Python Script ability.
Quick learner with excellent interpersonal, verbal/written communications, problem solving and decision-making skills
Traits:
Adaptable, Versatile, Global Approach/Synthesis, creative and capable of working independently as well as a team player. Should have a solid sense of urgency.
Solutions orientation; Quality driven; Execution minded