JD for-Lead Verification Engineer:
Drive and lead SOC verification execution after having co-ordination with SOC (Design, DFT, PD), System and SW engineering teams.
Take ownership of the multiple SOC verification for the targeted functional domain.
Work with customer on feature requirements, use case scenarios, test plan reviews to realize the SOC is meeting all functional aspects of the targeted domain.
Work with architecture and design team on high level arch and use case scenarios and config space.
Work with IP team for IP requirement and deliverables.
Work with vendors and ODC members for the successful project execution
Work with program management team for SOC planning, schedule, resource demand/supply, critical path analysis, dev cost and execution.
Work with post-Si team to drive Si bring up and ramp to productization
Pattern Verification manager who has work experience with Patterns/Crest functional domains.
Develop the patterns, Verifying and delivering patterns to Product Engineering team for silicon validation.




Develop the test plan for the patterns at SOC level and get it reviewed with stake holders.
Work with IP design team for IP requirement and deliverables.
Work with program management team for Patterns planning, schedule, critical path analysis and execution.
Driving SOC verification from feature extraction to tape-out and productization.
Adapt the Design changes, Verification Architect, Test-plan creation, Power Reduction, Timing Convergence, test bench and test plan reviews tape-outs.
Running regular execution meetings, scrums, standing meetings and resolving bottlenecks.
Project planning including schedule, deliverables, risk and mitigations options.
Drive the team for the bug free silicon deliverable

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