10+ years of experience in SoC PnP Architecture within the semiconductor industry, with a strong track record of driving system-level performance, power, and efficiency investigations across complex silicon platforms. Strong expertise in SoC performance architecture and pre-silicon performance analysis, including: Hands-on experience with simulation and hardware emulation platforms such as Palladium, Veloce, ZeBu, or equivalent

Performance analysis using cycle-accurate, transaction-level, and emulation-based environments

Waveform-based debug and signal-level performance analysis

Latency, bandwidth, throughput, QoS, and utilization characterization

Transaction-level tracing and protocol debug across CHI, AXI, PCIe, CXL, or equivalent system protocols

Identification of system-level bottlenecks across compute, interconnect, memory, and IO subsystems

Architectural tradeoff analysis across performance, power, area, latency, bandwidth, and implementation complexity Strong experience with SOC Performance and Power modeling methodologies, including: Development and use of SystemC/TLM, analytical, trace-driven architecture models

Building and calibrating models for performance, power, latency, bandwidth, utilization, and efficiency analysis

Model-to-silicon correlation, including alignment of pre-silicon projections, emulation results, and post-silicon measurements

Early-stage architecture exploration to evaluate performance, power, area, thermal, TDP, and efficiency tradeoffs

Using models to guide SoC architecture decisions, IP configuration, memory/interconnect sizing, QoS strategy, and platform-level optimization

Ability to translate modeling insights into transparent architectural recommendations and measurable product improvements Extensive Experience In Post-silicon Performance And Power Characterization, Including Silicon bring-up support from a performance and PnP perspective

Performance counter, PMU, telemetry, and trace-driven investigations

Correlation of pre-silicon projections, architectural models, and silicon measurements

Root-cause analysis of performance gaps, power inefficiencies, and workload-level bottlenecks

System-level performance tuning under real silicon constraints

Analysis of workload behavior under power, thermal, voltage, frequency, and TDP limits Strong understanding of SoC system infrastructure and platform-level PnP behavior, including: Coherent interconnect fabrics and cache-coherency protocols

DDR memory subsystems, memory controller behavior, scheduling, QoS, and bandwidth efficiency

IO subsystems including PCIe, CXL

Power management architecture, DVFS, clocking, voltage domains, power states,



and throttling mechanisms Proven experience working in both Linux and bare-metal environments, including: Performance profiling and debug in Linux-based systems

Kernel-level performance analysis and tracing using perf, ftrace, PMU-based analysis, or equivalent tools

Low-level bring-up, debug, and performance characterization in bare-metal environments

Understanding of boot flows, firmware interactions, BIOS/UEFI or bootloader configuration, and system initialization impacts on performance and power

Ability to debug issues across hardware, firmware, OS, driver, and workload layers Strong Background In Computer Architecture And Microarchitecture, Including CPU/GPU/NPU/DSP or accelerator performance behavior

Pipelines, cache hierarchy, prefetching, coherency, memory systems, and interconnect behavior

System-level performance interactions across compute, memory, IO, and power-management blocks

Workload characterization and mapping of application behavior to architectural bottlenecks Proficiency in C/C++ and Python for developing: Performance and power analysis tools

Automation frameworks

Profiling and telemetry infrastructure

Data analysis and visualization dashboards

Correlation flows across model, emulation, and silicon data Excellent communication and cross-functional collaboration skills, with the ability to: Clearly present complex performance and power findings to architecture, design, verification, firmware, software, and leadership teams

Drive data-based architectural recommendations

Influence SoC architecture, platform configuration, and product-level PnP decisions

Lead investigations across multiple teams and convert debug findings into architectural improvements, tuning proposals, or product guidance Our 10x Mindset At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology.

We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: https://careers.arm.com/10x-mindset Use of AI in Your Application At Arm,



we embrace the benefits AI can bring, including in recruitment. You may use AI to support your preparation, such as improving the clarity of written responses, practicing interview questions, or learning more about our industry.

However, your application and interview responses must reflect your own thinking, experience, and abilities. We want to understand your authentic perspective, creativity, and approach to problem solving. As such, you may not use AI to complete assigned tasks as part of any assessments.

If you plan to use AI-supported or assistive technologies as part of a reasonable adjustment, please contact [email protected] so we can support you.

Recruitment

Adjustments and Accommodations At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email [email protected] . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations.

All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs.

Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

📌 SoC PnP Architect (Bengaluru)
🏢 ARM
📍 Bengaluru