Role Summary

Deep technical specialist (individual-contributor track) recognised as the go-to authority in one or more validation domains, driving the hardest bring-up and debug problems to closure across pre-silicon, power-on, and post-silicon phases — the senior anchor in the 1:2 senior-to-junior pod model.

Key Responsibilities

Domain mastery & bring-up: Lead deep-dive validation and bring-up in a specialist area — e.g., DDR4 / DDR5 / LPDDR4/5 (1D/2D calibration, controller/PHY programming, ODT/terminations, margining), or PCIe / CXL, or CPU / interconnect, or security / crypto.

Validation architecture: Define high-level validation requirements and strategy; architect the software/test components needed to fully validate a SoC in pre-silicon (emulation / FPGA / VP) and post-silicon automated environments.

Advanced debug: Own first- and second-level debug of failing tests; use CPU / system-architecture knowledge, custom tools, logic/protocol analyzers, and D-Streamer / JTAG to root-cause silicon and test anomalies.





Methodology & tools: Build and enhance validation infrastructure and custom SV tools / methodologies; drive coverage closure and quality-to-silicon.

Technical leadership (without people management): Set technical direction, review test content, and mentor engineers across programs; interface with design, DFT, firmware, and customer architecture teams.

Required Skills

9–15 years in end-to-end SoC / PSV validation with proven specialist depth in at least one high-value domain.

Solid hands-on Linux, C/C++, Python / Perl / Tcl.

Emulation sign-off experience (Veloce / Zebu / Palladium / HAPS); U-Boot-based validation and open-source bring-up.

Deep exposure across domains: Graphics, DDR / HBM, PCIe / CXL, USB, audio, vision (MIPI), security / crypto, high-speed networking.

Robust system-margin validation and characterization (PVT) understanding

📌 Senior Validation Specialist (Bengaluru)
🏢 HCLTech
📍 Bengaluru