Location: Chennai

Employment Type: Full time (FTE)

Experience: 5–7 Years

Notice Period: 15-30 Days or (Serving Notice) About the Role

We are looking for a highly skilled Senior FPGA Design Engineer with 5–7 years of experience in FPGA RTL design and development for defence, aerospace, or high-speed digital systems. Key Responsibilities

Develop and implement RTL designs using VHDL/Verilog.

Generate and analyse system and hardware requirements.

Follow the DO-254 design and verification lifecycle for safety-critical FPGA development.

Perform FPGA synthesis, implementation, static timing analysis (STA), timing closure, and design constraint development.

Design, integrate, and validate FPGA-based solutions on Xilinx and Intel (Altera) platforms.

Develop and maintain simulation environments, testbenches, and verification methodologies.

Interface and integrate high-speed communication protocols including PCIe, Ethernet, DDR, JESD,



and ARINC.

Perform FPGA debugging using logic analyzers, Integrated Logic Analyzer (ILA), and hardware validation tools.

Optimize FPGA designs by balancing area, power, and performance requirements.

Support board bring-up, hardware integration, and system-level troubleshooting.

Collaborate with cross-functional hardware, firmware, software, and system engineering teams throughout the product lifecycle.

Required Technical Skills FPGA Design

RTL Design using VHDL and Verilog

FPGA architecture and implementation

Design constraints (SDC/XDC)

Static Timing Analysis (STA)

Timing Closure

Floorplanning

High-Speed Interfaces & Protocols

PCI Express (PCIe)

JESD204

ARINC Protocols

Multi-Gigabit Transceivers (SERDES)

📌 FPGA Design Engineer (Chennai)
🏢 Vysystems
📍 Chennai