Role Overview

We are looking for interns interested in digital ASIC verification, protocol debugging and technical problem-solving.

Selected interns will receive structured training in PCI Express and will assist with analysing simulation logs, protocol activity and design-related evidence. The role involves understanding failures across different protocol and system layers, documenting observations and supporting technical investigations.

Prior PCIe experience is not required.

Responsibilities

- Study PCIe fundamentals through a structured training program.
- Analyse simulation, VIP and design logs.
- Trace transactions and identify relevant protocol events.
- Assist in investigating common verification and debug issues.
- Review technical findings and report missing or incorrect correlations.
- Prepare explicit investigation notes and escalation summaries.
- Support technical users after completing the initial training.
- Contribute to internal training material and debug case studies.

Required Background

- Recent graduate in ECE, Electrical Engineering, VLSI, Embedded Systems, Computer Engineering or a related discipline.
- Good understanding of digital logic and synchronous design.




- Basic knowledge of Verilog or SystemVerilog.
- Introductory understanding of ASIC or FPGA verification.
- Familiarity with at least one protocol such as AHB, APB, AXI, PCIe, USB or Ethernet.
- Ability to analyse technical information carefully and communicate clearly.

Preferred Skills

- Basic UVM knowledge.
- Experience with RTL simulation, logs or waveform debugging.
- Familiarity with Python, scripting or regular expressions.
- Exposure to Linux command-line tools.
- Academic projects involving digital design, verification, SoCs or communication protocols.

Ideal Candidate The role is suitable for someone who:

- enjoys debugging and understanding why systems fail;
- is patient and detail-oriented;
- can distinguish evidence from assumptions;
- is willing to learn PCIe in depth;
- can document technical observations clearly;
- is comfortable working with logs and incomplete information.

Duration

6 months

Application

Please send your resume and a brief description of relevant coursework or projects to [email protected]

📌 Digital Verification and Protocol Debug Intern (Lucknow)
🏢 Genxchips
📍 Lucknow