Company Description LeadIC Design Pvt Ltd accelerates semiconductor innovation through full-stack VLSI engineering expertise, supporting the complete chip development lifecycle for global semiconductor companies. Founded in 2018, the company has grown into a trusted partner known for deep technical capability, strong execution ownership, and flexible engagement models. With engineering teams across India and Canada, LeadIC delivers high-quality design services tailored to product-focused teams.

Its offerings span custom, memory and analog layout, analog/mixed-signal circuit design, digital design and verification, physical design and signoff, STA, DFT, and IP characterization, as well as FPGA-based prototyping and validation. LeadIC emphasizes an engineering culture built on ownership, quality-driven execution, and long-term technical partnerships that accelerate silicon success.

Role Description This is a full-time, on-site Analog Layout role based in Bengaluru. The role focuses on custom analog layout design, including floorplanning, device placement, routing, and optimization for performance, area, and reliability. Day-to-day responsibilities include working closely with analog and mixed-signal circuit designers, implementing layouts to meet DRC/LVS requirements, and collaborating with physical verification teams to resolve layout issues.

The role involves interpreting schematics, ensuring adherence to foundry design rules, optimizing matching and parasitics,



and supporting tape-out activities for complex analog and mixed-signal blocks. The candidate will also participate in design reviews, maintain documentation, and contribute to continuous improvement of layout methodologies and best practices.

Qualifications

Candidates should possess strong skills in Layout Design, with experience in analog and mixed-signal block implementation and optimization.

Candidates should possess foundational skills in Graphic Design and Graphics when using EDA tools and visualizing complex layouts.

Candidates should possess skills in Page Layout for organizing and presenting technical documentation, layout reports, and design reviews.

Candidates should possess basic awareness of Digital Marketing to support internal and external communication of engineering capabilities, if required.

Candidates should have 4–6 years of relevant experience in analog/custom layout using industry-standard EDA tools (e.g., Cadence Virtuoso or similar).

Candidates should have a robust understanding of CMOS processes, foundry design rules, DRC/LVS, EM/IR, and layout techniques for matching and low noise.

Candidates should demonstrate good analytical skills, attention to detail, and the ability to collaborate effectively with cross-functional design teams.

A bachelor’s or master’s degree in Electronics, Electrical Engineering, VLSI, or a related discipline is preferred.

📌 Analog Layout - 4 to 6 Years - Bangalore Location (Bengaluru)
🏢 leadIC Design
📍 Bengaluru