AMS Design Verification Layout Engineers (Telangana)

AMS Design Verification Layout Engineers (Telangana)

31 Jul
|
Tuitions Tree
|
Telangana

31 Jul

Tuitions Tree

Telangana

Location – Noida, Hyderabad:

- AMS Layout Engineers – 4 Positions

- AMS Design / Verification / Layout Engineers – 8 Positions

Experience: 4 to 10 Years

Job Type: Full-time (On-site)

Notice Period: Immediate to 30 Days preferred

Role Categories:

1. AMS Design Engineer

- Experience in Analog and Mixed Signal circuit design

- Strong understanding of CMOS, PLLs, ADCs, DACs, LDOs, Oscillators, and Power Management blocks

2. AMS Verification Engineer

- Hands-on experience in AMS simulation techniques using Verilog-AMS or SystemVerilog-AMS

- Positive exposure to mixed-signal testbench development and verification methodology

3. AMS Layout Engineer

- Deep knowledge of analog/mixed-signal layout including matching, shielding, floor planning, and DRC/LVS checks

- Experience with layout tools such as Virtuoso, Calibre, etc.

Desired Skills:

- Solid understanding of analog and mixed-signal concepts

- Proficiency with industry-standard EDA tools (Cadence Virtuoso, Spectre, Calibre, etc.)

- Prior experience in tape-outs at advanced technology nodes (28nm and below is a plus)

- Strong communication and collaboration skills

📌 AMS Design Verification Layout Engineers (Telangana)
🏢 Tuitions Tree
📍 Telangana

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: ams design verification layout engineers (telangana) / telangana

Subscribe to this job alert:

Get the latest job offers by email for: ams design verification layout engineers (telangana) / telangana