01 Aug
|
ACL Digital
|
Bengaluru
01 Aug
ACL Digital
Bengaluru
Job Description Job Title: Memory Design Engineer
n Experience Required: 2+ Years
n Location: Bangalore
n Job Type: Full-time
n Industry: Semiconductors / VLSI / Memory IP
n Job Summary:
n We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power memory blocks (e.g., SRAM, ROM, Register Files) for use in SoCs and ASICs across leading-edge process technologies.
n Key Responsibilities:
n n Design custom memory circuits such as SRAM, ROM, CAM, Register Files, or eFuse.
n Work closely with layout, verification, and technology teams to ensure optimal performance, power, and area (PPA).
n Perform transistor-level circuit design, simulation, and optimization for speed, power, and robustness.
n Analyze and simulate key circuits: sense amplifiers, bitline pre-charge, wordline drivers, decoders, write drivers, etc.
n Run simulations across PVT corners using tools like HSPICE, Spectre, or XA.
n Collaborate with layout teams for floorplanning and to ensure DRC/LVS clean layouts.
n Perform post-layout simulations and analysis (IR drop, EM, aging).
n Participate in memory characterization, yield improvement, and silicon bring-up support.
n Contribute to memory compiler development (if applicable).
n n Required Skills and Experience:
n n B.E/B.Tech or M.E/M.Tech in Electronics, Electrical Engineering, or VLSI.
n 2+ years of experience in full custom memory design.
n Solid background in analog/mixed-signal CMOS circuit design.
n Proficiency in simulation tools: HSPICE, Spectre, FastSPICE, XA.
n Experience with design in advanced nodes (e.g., 28nm, 16nm, 7nm, 5nm, FinFET).
n Familiarity with ESD, IR drop, EM, and reliability analysis techniques.
n Understanding of process variation and Monte Carlo simulations.
n Good debugging, problem-solving, and documentation skills.
n n Preferred Qualifications:
n n Experience with memory compiler architecture/design.
n Knowledge of radiation-hardened memory (RHBD) or safety-compliant memory (ISO 26262).
n Scripting knowledge (e.g., Python, Perl, Tcl) for automation.
n Exposure to silicon bring-up and correlation to simulation results.
n n Interested can share Cv to
📌 Memory Design Engineers (Bengaluru)
🏢 ACL Digital
📍 Bengaluru