Key Responsibilities
Design, develop, validate, and enhance Verification IP (VIP) solutions for protocol verification.
Develop reusable verification components, testbenches, and verification frameworks using SystemVerilog and UVM.
Implement and maintain protocol models and supporting software components using C++.
Lead and coordinate multiple VIP development projects simultaneously.
Mentor and guide junior engineers while contributing to technical leadership within the team.
Collaborate with customers to understand verification requirements and provide technical solutions.
Debug complex verification issues and drive root-cause analysis and resolution.
Support protocol compliance, verification planning, coverage closure, and quality improvements.
Work closely with architecture, design, verification, and product teams to deliver robust verification solutions.
Contribute to continuous improvements in verification methodologies, automation, and development processes.

📌 Principal Software Engineer Ahmedabad
🏢 Cadence
📍 Ahmedabad