Senior SoC Director Senior Principal Engineer Bangalore Hyderabad Bangalore Engineering Digital Circuit Design Hyderabad Bangalore SOC Development Engineering Full-time Hybrid we are working on exciting solutions and chips for next generation automotive and space applications and looking for talented and capable engineers The Director of digital and mixed-signal engineering will be responsible for development of mixed-signal SOC being developed at ODT and build the digital engineering team and will work Analog RF engineering FW engineering verification Systems Validation team Operations SOC Architects and report to the VP SVP of ASIC Engineering Nice to have experience in UCIE PCIE Gen5 Gen6 Gen7 Roles and Responsibilities Manage digital team hire and retain best talent Lead SOC integration design team to develop and productize next generation mixed-signal RF communication SOCs Work with cross-functional project teams to define product specifications system architecture HW SW partitioning and execution plan Implement best SoC development practices and improve design methodology to maximize efficiency and predictability Deliver chip architecture design integration programming model verification and manage hand-off to backend Support Silicon and System Validation support system integration and production testing Drive innovation and provides leadership to the organization to ensure world-class system solutions and flawless execution Qualifications BSEE Required MSEE Preferred Proven track record of success in high-performance high-volume semiconductor industry SoC embedded CPU and bus architectures networking and control interfaces Communications DSP algorithms and power area efficient implementations Digital IC design design for low power and high speed design for test DFT System modeling RTL coding Lint CDC checking simulation synthesis power analysis timing analysis in Cadence Synopsys design environments Directed and constrained random verification UVM methodology Embedded systems FPGA emulation lab debug and chip validation Project planning and execution and performing design tradeoffs to achieve performance power die size and schedule targets Self-motivated excellent communication skills and ability to excel and to provide leadership in a fast-paced environment Senior Management experience preferred Work with architecture physical design and design teams to lead the implementation of the digital architecture Develop and refine specification of the micro-architecture for the digital architecture Is in tune with industry trends and contributes to consistent roadmap decisions Experience 12-25 years of experience in the area of RTL design and verification of silicon At Least 3 years experience in leading low-power mixed-Signal SOC design 10 years of experience with FPGA architecture specification and design Altera or Xilinx for high-speed serial protocols including USB-SS PCIe SATA SAS DisplayPort Experience in leading specifying and work with Analog RF team in developing verifying and productizing SERDES CDR and PLL DLL designs Experience with USB 3 0 DisplayPort PCIe or SATA based silicon designs preferred Solid background in analog mixed-signal integrated SOC Development Strong Hardware design knowledge and familiarity with signal integrity Strong foundation in SoC architecture design verification and physical implementation Strong analytical problem solving and attention to details Knowledge of wireless mobile and storage domains Expertise in Verilog System Verilog C C SystemC UVM Scripting languages like Perl Python etc Excellent technical documentation skills Excellent written and verbal communication skills Excellent interpersonal skills self-motivated self-starter Experience in startup environment Expectations Put the RTL for the Full chip together Evaluate the IP we have to license like PCIe LPDDR4 JESD 204C PHY Help develop any BIST Work with Verification Team to develop the FC Simulation test suites Develop the RTL for the various state machines and interfaces Run a few of the simulations Help with the FC simulations debug Help close the timing issues if any come up and work with the PD person to resolve any SI issues Be a mentor and lead a team of Digital design engineers Work with Systems and Test engineering team to help validate the parts and release them to production

📌 Senior Soc Director ( Bangalore ) (Bengaluru)
🏢 Best NanoTech
📍 Bengaluru