Minimum qualifications Bachelor s degree in Electrical Engineering Computer Engineering Computer Science or a related field or equivalent practical experience 10 years of experience in creating and using verification components and environments in standard verification methodology Experience verifying digital systems using standard IP components interconnects microprocessor cores hierarchical memory subsystems Preferred qualifications Master s degree or PhD in Electrical Engineering Computer Engineering or Computer Science with an emphasis on computer architecture Experience in low-power design verification Experience with Interconnect Protocols e g AHB AXI ACE CHI CCIX CXL Experience in Architectural background in one or more of the following Caches Hierarchies Coherency Memory Consistency Models DDR LPDDR PCIe Packet Processors Security Clock and Power Controllers About the job Be part of a team that pushes boundaries developing custom silicon solutions that power the future of Google s direct-to-consumer products You ll contribute to the innovation behind products loved by millions worldwide Your expertise will shape the next generation of hardware experiences delivering unparalleled performance efficiency and integration Google s mission is to organize the world s information and make it universally accessible and useful Our team combines the best of Google AI Software and Hardware to create radically helpful experiences We research design and develop new technologies and hardware to make computing faster seamless and more powerful We aim to make people s lives better through technology Responsibilities Verify designs using verification techniques and methodologies Work cross-functionally to debug failures and verify the functional correctness of the design Provide test plans including verification strategy environment components stimulus checks and coverage and ensure documentation is easy to use Plan and execute the verification of the next generation configurable Infrastructure IPs interconnects and memory subsystems Debug tests with design engineers to deliver functionally correct blocks and subsystems Close coverage measures to identify verification holes and to show progress towards tape-out Google is proud to be an equal opportunity workplace and is an affirmative action employer We are committed to equal employment chance regardless of race color ancestry religion sex national origin sexual orientation age citizenship marital status disability gender identity or Veteran status We also consider qualified applicants regardless of criminal histories consistent with legal requirements See also Google s EEO Policy and EEO is the Law If you have a disability or special need that requires accommodation please let us know by completing our Accommodations for Applicants form

📌 Asic Design Verification Lead, Silicon (Karnataka)
🏢 Important Group
📍 Karnataka