Job Title:PDK Design Engineer (0.6–2 Years Experience)

Location: Bangalore / Hubli

Experience: 6 Months – 2 Years

CTC: Up to 6 LPA (Maximum)

Joining: Immediate Joiners Preferred

Bond Period: Applicable

Job Overview:

We are looking for a motivated and detail-oriented PDK Design Engineer with 6 months to 2 years of experience. The candidate will be involved in the design, simulation, and validation of analog circuits for semiconductor applications.

Key Responsibilities:
Design and develop analog circuits such as amplifiers, current mirrors, bandgap references, etc.
Perform circuit simulation, verification, and debugging using industry-standard EDA tools
Work closely with layout, verification, and testing teams
Analyze performance metrics like power, noise, gain, and stability
Support silicon validation and debugging activities
Document design specifications and results

Required Skills:




Robust fundamentals in Analog Electronics and circuit theory
Hands-on experience with Cadence tools (Virtuoso, Spectre, etc.) or equivalent
Basic understanding of CMOS technology
Exposure to simulation, schematic design, and debugging
Positive analytical and problem-solving skills

Educational Qualification:
B.E / B.Tech / M.E / M.Tech in Electronics, ECE, VLSI, or related field

Preferred Criteria:
Exposure to analog layout concepts is an added advantage
Internship or project experience in analog design preferred
Immediate joiners will be given priority

Additional Information:
Candidates should be willing to sign a bond agreement as per company policy
Adaptable to work from Bangalore or Hubli location

📌 Design Engineer Gulbarga
🏢 HCLTech
📍 Gulbarga