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{ #uc_ue_table_elementor_a04d569 .tabulator-col-resize-handle { border-width: ; } } #uc_ue_table_elementor_a04d569 .tabulator-headers .tabulator-col: last-of-type, #uc_ue_table_elementor_a04d569 .tabulator-row .tabulator-cell: last-of-type{ border-right: none !significant; } #uc_ue_table_elementor_a04d569 .tabulator-col-resize-handle: last-of-type { display: none; } .tabulator-col, .tabulator-row, .tabulator-cell, .ue-table-column__button { transition: all .2s ease-in-out; } .ue-table-column__button { display: inline-block; } /* . tabulator-headers >.tabulator-col: not([class*='elementor-repeater-item']), . tabulator-table >.tabulator-row >.tabulator-cell: not([tabulator-field*='column']) { width: 0px!important; } */
Location
Bangalore
Education Engineering degree in E&C;
Experience 3 to 6 years

Job Description:
Understand customer’s requirements /specifications /tender enquiry. Define DSP, System and Board architecture.
Project ownership from concept to delivery. This includes identifying risks, dependencies, creating mitigation plan, tracking project schedule, discussions with customers, design reviews.
Partition the algorithms for implementing in FPGA and/or in SW. Identify the building blocks & Signal Processing functions.
Provide estimates on FPGA resources, computation bandwidth, and memory bandwidth.
Create module level details from architecture, coding, simulation and perform peer reviews. Apply the methodologies for design, verification or validation.
Define, create and maintain all project related documentation, especially design documents with detailed analysis reports.
Provide support to customer during integration phases at test sites and support to production teams.
Defining the architecture of RTL functions
HDL Coding
Simulation and Implementation
Testing on board and debugging

Professional Skills:
VHDL Knowledge
Xilinx tools for synthesis and implementation
Thorough understanding of Xilinx FPGA’s
Functional Simulation
Hardware Design : Logic Design & Debugging expertise
FPGA Design : VHDL/Verilog RTL Coding, System C/ System Verilog




FPGA Synthesis & PAR Tools
Implementing DSP algorithms in FPGA environment for Radar and Electronic Warfare systems.
Modeling the algorithms in Octave/MATLAB, generating test vectors, visualizing data.
Working knowledge on interfacing with ADCs and DACs and interpreting their performance.
Fluency, good communication & presentation skills.
Configuration/Version control tools like SVN

Location:
Bangalore

Education:
Engineering degree in E&C;

Experience:
3 to 6 years’ experience

Job Description:
Understand customer’s requirements /specifications /tender enquiry. Define DSP, System and Board architecture.
Project ownership from concept to delivery. This includes identifying risks, dependencies, creating mitigation plan, tracking project schedule, discussions with customers, design reviews.
Partition the algorithms for implementing in FPGA and/or in SW. Identify the building blocks & Signal Processing functions.
Provide estimates on FPGA resources, computation bandwidth, and memory bandwidth.
Create module level details from architecture, coding, simulation and perform peer reviews. Apply the methodologies for design, verification or validation.
Define, create and maintain all project related documentation, especially design documents with detailed analysis reports.
Provide support to customer during integration phases at test sites and support to production teams.
Defining the architecture of RTL functions
HDL Coding
Simulation and Implementation
Testing on board and debugging

Professional Skills:
VHDL Knowledge
Xilinx tools for synthesis and implementation
Thorough understanding of Xilinx FPGA’s
Functional Simulation
Hardware Design : Logic Design & Debugging expertise
FPGA Design : VHDL/Verilog RTL Coding, System C/ System Verilog
FPGA Synthesis & PAR Tools
Implementing DSP algorithms in FPGA environment for Radar and Electronic Warfare systems.
Modeling the algorithms in Octave/MATLAB, generating test vectors, visualizing data.
Working knowledge on interfacing with ADCs and DACs and interpreting their performance.
Fluency, valuable communication & presentation skills.
Configuration/Version control tools like SVN
Job Category: Design Engineer
Job Type: Full Time
Job Location: Bangalore
Experience: 3 to 6 Years
Education: Engineering degree in E&C;

📌 RTL Design Engineer (India)
🏢 CoreEl Technologies
📍 India