- Hands on experience in Tessent DFT RTL insertion, DRC checks and debug is a must.
- Hands on experience on Scan Insertion, ATPG, GLS debug, MBIST pattern generation and validation.
- Working knowledge of timing enabled GLS and related debug.
- A basic understanding of DFT IPs like OCC, EDT, SSN, MBIST controllers, IJTAG, IEEE 1600 standard, and Boundary scan.
- Should be able to handle tasks independently.
- The candidate needs to have positive debug skills and should be able to communicate related issues to the larger team.
- Working knowledge of TCL is an add-on.
Experience (years) : 4+ years
Education Qualification:
BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent
📌 DFT Engineer (India)
🏢 Mirafra Software Technologies
📍 India
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