Overview WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry our communities and the world Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center artificial intelligence PCs gaming and embedded Underpinning our mission is the AMD culture We push the limits of innovation to solve the world s most important challenges We strive for execution excellence while being direct humble cooperative and inclusive of diverse perspectives AMD together we advance Responsibilities THE ROLE Join AMD as we push the boundaries of what s possible in graphics and compute technology We are seeking a talented RTL Physical Design Engineer to contribute to the development and optimization of our cutting-edge CDNA and RDNA graphics IP This role involves transforming sophisticated RTL designs into robust and efficient physical layouts critical to the performance of our next-generation graphics and compute solutions THE PERSON You have a passion for modern complex processor architecture digital design and verification in general You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites timezones You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems Key Responsibilities Physical Design Implementation Translate complex CDNA and RDNA graphics IP RTL designs into optimized physical layouts Utilize industry-leading EDA tools for synthesis place-and-route PnR and physical verification processes to take the design thru mock-taepout Performance Optimization Focus on power performance and area PPA optimization to meet the stringent requirements of high-performance graphics and compute products Collaborate with architecture and front-end design teams to align RTL design with physical constraints and objectives Verification and Timing Closure Conduct static timing analysis STA to ensure robust timing closure and sign-off for graphics IP Implement and verify design rule checks DRC layout versus schematic checks LVS and power grid analysis tailored to CDNA and RDNA requirements Collaboration and Communication Work closely with cross-functional teams including architects RTL designers and verification engineers to ensure seamless integration and functionality of graphics IP cores Provide feedback and suggest improvements to design methodologies and processes to push the technology envelope further Documentation and Reporting Maintain comprehensive design documentation methodologies and updates Prepare detailed reports on design progress performance metrics and any technical challenges encountered PREFERRED EXPERIENCE Domain Expertise Experience with working on complex design and optimizing for performance power and area Technical Proficiency Proven track record in RTL synthesis place-and-route PnR and static timing analysis STA for complex IP cores Proficiency with industry-leading EDA tools such as Synopsys Design Compiler Cadence Innovus and timing analysis tools like PrimeTime Experience with low-power design methodologies and techniques for high-performance graphics IP Design and Verification Successful completion of full-chip sign-off including design rule checks DRC and layout versus schematic LVS checks Strong skills in signal integrity analysis including crosstalk and IR drop evaluations Process Technology Experience working with advanced semiconductor process nodes e g 7nm 5nm or below Knowledge of process-related challenges and optimization techniques for graphics applications Scripting and Automation Proficiency in scripting languages such as Perl Python or TCL to automate design flows and improve efficiency Experience developing and maintaining scripts for design rule checks and optimization processes Problem-Solving and Innovation Demonstrated ability to solve complex design challenges using innovative approaches A track record of contributing to the improvement of design techniques and methodologies in a graphics-focused engineering team ACADEMIC CREDENTIALS Bachelors or Masters degree in computer engineering Electrical Engineering LI-NS1 Qualifications Benefits offered are described AMD benefits at a glance AMD does not accept unsolicited resumes from headhunters recruitment agencies or fee-based recruitment services AMD and its subsidiaries are equal opportunity inclusive employers and will consider all applicants without regard to age ancestry color marital status medical condition mental or physical disability national origin race religion political and or third-party affiliation sex pregnancy sexual orientation gender identity military or veteran status or any other characteristic protected by law We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process

📌 Rtl-physical Design Lead (Karnataka)
🏢 AMD
📍 Karnataka