Seeking Senior PCB Layout Designer who will design complex high-speed PCBs.
Key Responsibilities
- Layout for multilayer boards (>10 layers) supporting High speed Serdes Interface (upto 224G) and High-power solutions (KW).
- Create and Maintain footprints in the library and validate.
- Feasibility studies for various system and board configurations and identifying the tradeoffs.
- Perform constraint-driven routing of critical nets length matching, differential pair tuning, via stub minimization.
- Design for DFM/DFT.
Required Qualifications
- 8+ years of skilled PCB PnR experience on high-speed Serdes designs and high power.
- Deep proficiency in Altium, Cadence Allegro tool.
- Proven hands-on experience defining the HDI stack-up and designing HDI boards with blind/buried vias.
- Demonstrated expertise in symbol and footprint generation from Scratch.
- Solid understanding of SI design: Breakout, Via stubs, Loss, xtalk and impedance requirements.
- Solid understanding of PDN design:
decoupling solution, Power stage and inductor design, Isolation requirements.
- B.S. in Electrical Engineering, Electronics Technology, or equivalent demonstrated experience.
Preferred Qualifications
- Worked on RF, Wireless, PCIe Gen6/7 and 112G/224G Ethernet interfaces.
- Experience having worked on Fanless designs and knowledge/experience in IP65, IP67 outdoor equipments.
- Understanding of the various connector solutions for high speed Serdes.
- Hands-on experience working from the start to the finish of the PCB design.
- Tools: Altium (must have), Cadence Allegro, Siemens Xpedition Schematic.
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