IP Verification Engineer (Bengaluru)

IP Verification Engineer (Bengaluru)

02 Aug
|
Tech Mahindra
|
Bengaluru

02 Aug

Tech Mahindra

Bengaluru

Brief About Tech Mahindra – Silicon Engineering

Tech Mahindra Silicon Engineering is a key part of Tech Mahindra's semiconductor and engineering services portfolio, delivering end-to-end solutions across the silicon lifecycle for global semiconductor, automotive, consumer, and industrial clients. The practice focuses on VLSI, embedded systems, and platform engineering, supporting customers from architecture and design through verification, validation, and sustenance engineering.

The Silicon

Engineering unit works across IP, Subsystem, and SoC-level development, offering capabilities in areas such as Design Verification, RTL Design, DFT, Physical Design, Post-Silicon Validation, Embedded Software, and System Modeling & Simulation. Teams leverage industry-standard methodologies, tools, and verification frameworks to deliver high-quality, production-ready silicon solutions. Backed by Tech Mahindra's global engineering DNA, the Silicon Engineering practice collaborates with leading semiconductor and technology clients worldwide, operating as an extended engineering arm to accelerate innovation, reduce time-to-market, and ensure reliable, scalable silicon platforms.

It is part of Tech Mahindra's broader engineering-led growth strategy serving multiple global industries. About the Role

We are looking for a highly motivated IP Verification Engineer to join our growing Silicon Engineering team. In this role, you will be responsible for verifying complex semiconductor IPs and ensuring functional correctness, quality, and performance before SoC integration. You will work closely with architecture, RTL design,



and SoC verification teams to develop robust verification environments, create comprehensive test plans, and execute verification strategies using industry-standard methodologies such as SystemVerilog and UVM.

This role provides an exciting chance to contribute to the development of next-generation semiconductor products for leading global technology companies. Key Responsibilities

Develop and execute comprehensive IP Verification plans, testbenches, and verification environments

Build reusable verification components using SystemVerilog and UVM methodology

Create directed and constrained-random test cases to achieve verification coverage goals

Perform functional, code, assertion, and toggle coverage analysis

Develop verification test plans based on design specifications and architecture documents

Debug simulation failures and work closely with RTL designers to resolve functional issues

Write and integrate SystemVerilog Assertions (SVA) for protocol and design checking

Verify industry-standard protocols such as PCIe, USB, Ethernet, AMBA AXI/AHB/APB, DDR, MIPI, or CXL

Support IP integration and SoC-level verification activities

Develop automation and regression frameworks using Python, Perl, Shell, or Tcl scripting





Participate in design reviews, verification reviews, and customer technical discussions

Ensure timely closure of verification milestones while maintaining high-quality standards Qualifications

BE/BTech/ME/MTech degree in Electronics, Electrical, Communication Engineering, Computer Science, or related disciplines.

Required Skills

Strong experience in Design Verification (IP/Sub-System/SoC Verification)

Proficiency in System Verilog and UVM

Hands-on experience in developing reusable verification environments

Experience with simulation tools such as VCS, Xcelium, QuestaSim, or Riviera

Knowledge of functional coverage, constrained random verification, and assertions

Experience with debugging RTL and verification environments

Understanding of semiconductor design flow and verification methodologies

Exposure to industry-standard protocols such as AXI, AHB, APB, PCIe, USB, DDR, Ethernet, MIPI, or CXL

Scripting skills in Python, Perl, Tcl, or Shell

Excellent problem-solving, debugging, and communication skills

Preferred Skills

Experience with formal verification methodologies

Knowledge of low-power verification techniques (UPF/CPF)

Experience with emulation or FPGA prototyping environments

Exposure to SoC integration and full-chip verification

Familiarity with coverage closure and verification sign-off processes Experience Range: 4-12 Years Join Tech Mahindra Silicon Engineering and help shape the future of next-generation semiconductor and SoC solutions through advanced IP Verification and validation excellence.

📌 IP Verification Engineer (Bengaluru)
🏢 Tech Mahindra
📍 Bengaluru

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