We are a US-funded fabless chip design venture operating a lean execution hub in Andhra Pradesh (Vijayawada). We are seeking a Fractional Senior VLSI Architect (10–15 hours/week) to serve as a Technical Lead and Design Reviewer.
Key Responsibilities:
Conduct high-level architecture sign-offs and review RTL/verification code written by our junior engineering team (supported by AI-native EDA tools).