- ASIC/SOC RTL Model Building using Emulator Compiler with customer specific requirements and Debugging
- Creating and maintaining scripts, config scripts for Emulation Model Building
- Cleaning up, Generation of Libraries for Model Building, Creating and maintaining emulation top wrapper
- Integrating of Transactors, Simulation & Emulation Specific files, Memory modules and other RTL modules
- Running the simulation tests, generation of Firmware hex files to be loaded onto the Emulation models
- Running the basic sanity checks for the model releases
- Running and integrate new test cases on Emulation Model to improve the Integrity of the released emulation model
- Analysing and finding root cause of the runtime errors in Emulation and providing solutions/fixes for the customer issues
- Solid in UVM, System Verilog (10 years and above)
- Writing C-based code for verification at SoC level
- Analyze and debug simulation failures for SoC subsystems and SOC top level tests
- Experienced in DDR, PCIE, AXI protocols
- Familiar with emulation using Zebu/Palladium/Veloce
- Strong interpersonal and communication skills
- Lead will manage a team of engineers to perform the above tasks
Experience
2 to 12 Years
Education
BE/ ME/ B.Tech/ M.Tech/ MS
Location
Bengaluru
Ahmedabad
Bhubaneswar
Noida
Hyderabad
Pune
Onsite in India
San Jose, USA
📌 Emulation Engineer (Lead/Senior/Junior) (India)
🏢 PerfectVIPs
📍 India
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