Experience required: 3-5 years The job Responsibilities:
- Participate in the functional verification of a block(s) of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
- Be part of a team of design and verification engineers, working closely with other team members to understand and verify the functionality of a given design element within the context of the block, chip and overall system.
- Be responsible for carefully documenting and executing test plan(s) consisting of directed and constrained-random tests to be run during simulation.
- Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.
- Be familiar with hardware modeling and/or assertion-based verification methods.
Key Skills Required:
- 3-4 years of proven verification experience on large ASIC development projects or software/firmware experience in a hardware development setting;Strong background in C/C++ development in a Linux Setting;Strong debug skills and experience with debug tools such as Gdb, Valgrind;Proficient in Object Oriented programming, STL, computer architecture and data structures;Knowledge of Perl and Makefiles;Experience in Verilog/SystemVerilog/SystemC, preferred;Experience in C/Verilog environment using DPI/PLI, preferred;Strong analytical skills and attention to detail;Excellent written and communication skills
Mandatory Skills:
- PCI express or any complex fabric protocol,
- UVM / SV, test Bench, Debugging skills
Interview Mode:
Round of interviews: 2
R1: F2F
R2: F2F(Both interviews will happen on the same day)
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.
📌 DV Engineer (Bengaluru)
🏢 Proxelera
📍 Bengaluru
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