ASIC RTL Design Lead - Verilog/SystemVerilog, CDC, Lint - [ID 014] (Noida)

ASIC RTL Design Lead - Verilog/SystemVerilog, CDC, Lint - [ID 014] (Noida)

02 Aug
|
Vitestork Consulting
|
Noida

02 Aug

Vitestork Consulting

Noida

Job Summary

ASIC RTL Design Lead - Verilog/SystemVerilog, CDC, Lint - [ID 014]

Responsibilities

- Robust ASIC RTL design (Verilog/SystemVerilog), CDC, Lint.

- Experience in micro-architecture, integration, and debugging.

- Exposure to synthesis, timing, and low-power design.

- Team leadership and cross-functional collaboration skills.

Qualifications

- Bachelors or Master s degree in Electrical Engineering, Computer Engineering, or a related field.

Skills

- Verilog

- SystemVerilog

- CDC

- Lint

- Microarchitecture

- Integration

Job Location

Noida

Experience

7 - 15 Yrs

Company

Well Established Semiconductor Services

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 ASIC RTL Design Lead - Verilog/SystemVerilog, CDC, Lint - [ID 014] (Noida)
🏢 Vitestork Consulting
📍 Noida

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