Responsible for overall sub-system verification and SoC verification from test plan creation, UVM development to signoff. Ensure first pass product through multi-dimensional verification coverage Proven track record of building testplan, UVM workplace and testbenches Collaborate with design and architecture teams to understand specifications and define verification strategies. Experience in SoC-C Verification and Low Power Verification Experience with RTL debugging, score boarding and code coverage analysis Experience of complex mixed signal design verification using state of the art flows and tools