Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
Join Our High-Performance CPU Design Team!
We are looking for passionate engineers to help shape the next generation of compute architectures. If you thrive on solving complex problems in cache design and coherency, this is your opportunity to make an impact.
Role Overview
As an
L2 Cache Design Engineer
, you will:
Drive
micro-architecture development
for L2 cache subsystems, from concept to detailed specification.
Implement and optimize
cache coherency protocols
for multi-core and multi-socket systems.
Collaborate with architects, RTL designers, and verification teams to deliver high-quality, low-power designs.
Analyze and improve
performance, power, and area (PPA)
trade-offs for cache structures.
Support
functional and performance verification
, ensuring correctness and efficiency.
Key Responsibilities
Develop
micro-architecture specifications
for L2 cache and related coherency logic.
Own RTL design and refinement to meet timing, power, and reliability goals.
Work closely with DV teams on
coherency verification strategies
.
Participate in
performance modeling and exploration
for high-bandwidth cache systems.
Contribute to
design methodology improvements
and automation.
Required Skills
Solid knowledge of
cache and memory subsystems
, including L2 cache design principles.
Expertise in
cache coherency protocols
(MESI/MOESI, directory-based schemes).
Proficiency in
SystemVerilog RTL
, simulation, and debug tools.
Familiarity with
AMBA CHI/AXI protocols
and interconnect design.
Understanding of
low-power design techniques
and timing closure.




Solid grasp of
computer architecture fundamentals
: pipeline design, hazard detection, ordering rules.
Experience with scripting (Perl/Python) for design automation is a plus.
Preferred Qualifications
2 to 15 years exp in CPU or SoC design focusing on cache/memory subsystems.
Hands-on experience with
multi-level cache hierarchies
and
coherency verification
.
Exposure to
physical design constraints
and PPA optimization.
Why Join Us?
Work on cutting-edge CPU architectures for high-performance, low-power devices.
Collaborate with world-class engineers in a dynamic, innovative environment.
Opportunities for growth and leadership in advanced micro-architecture design.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
Applicants
:
Qualcomm is an equal opportunity employer.



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. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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:
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.

📌 (Cpu)Cache Design Engineer Micro-Architecture & Coherency (Bengaluru)
🏢 Qualcomm
📍 Bengaluru