The Culture

The people are the culture. We encourage a culture of passion for technology solutions that impact businesses. We also make sure that our people pursue their individual passions. Working with us means you get an in-depth understanding of a range of industries and emerging technologies that help us build solutions that are futuristic and impactful. More importantly, the experience of being at MarvyLogic may help you evolve as a person toward enjoying a more fulfilling life.

8-15 years Bengaluru/Bangalore

Job Description

- Languages: Must have experience in Verilog/SystemVerilog.
- Methodology: Strong UVM (must) and Specman (is a plus).
- Formal verification experience is a plus.
- Experience with C++ is a plus.
- Experience with Automotive, MIPI PHY standards.
- Experience with PCIe and/or networking (Ethernet/PCS) protocol.
- Experience with gate level simulation and debug.
- Scripting:



Perl, Python.
- Experience with SoC verification.
- Positive interpersonal/communication skill.
- Experience in assertion methodology, emulation/hardware acceleration platforms is a plus.

Responsibilities

- 8 to 15 years of DV experience in building and architecting verification environments, preferably from scratch for multiple projects.
- The engineer should have experience in writing test plan, creating & enhancing verification environments and be comfortable coding any portion of a test bench (models, checkers, scoreboards, coverage monitors, etc.).
- Candidate should have experience in the development of constraint random DV environments for large ASIC blocks.

📌 DIGITAL DESIGN VERIFICATION (PHY) (India)
🏢 MarvyLogic
📍 India