Job Description
Synthesis for lower technologies with low power design techniques using UPF.
LEC for RTL2Gate & G2G methodologies including low power.
Func ECO Generation & FV using conformal.
SDC & UPF validation.
Constraints maintenance.
Technical lead for multiple programs.
Expert in TCL, Perl , python etc..,
STA timing closure.
Proficient in communication & work with cross teams/domains.
📌 STA/SYNTHESIS Eng (Vasanthanagar)
🏢 Cadence System Design and Analysis
📍 Vasanthanagar
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