Rtl Design- Sr Engineer (Uttar Pradesh)

Rtl Design- Sr Engineer (Uttar Pradesh)

03 Aug
|
Synopsys
|
Uttar Pradesh

03 Aug

Synopsys

Uttar Pradesh

Alternate Job Titles Senior ASIC Digital Design Engineer We Are At Synopsys we drive the innovations that shape the way we live and connect Our technology is central to the Era of Pervasive Intelligence from self-driving cars to learning machines We lead in chip design verification and IP integration empowering the creation of high-performance silicon chips and software content Join us to transform the future through continuous technological innovation You Are You are a driven and forward-thinking digital design engineer who thrives in a cooperative and innovative environment You possess a deep understanding of ASIC digital design flows and are passionate about working on the forefront of high-speed serial interfaces such as USB PCIe Ethernet DP2 0 and HDMI2 1 With a keen eye for detail and a commitment to quality you proactively seek out solutions to complex challenges and are eager to expand your expertise in both established and emerging technologies Your experience in HDL coding synthesis constraints and digital verification tools is complemented by your adaptability to new tools and protocols You value teamwork and open communication and you re motivated by the opportunity to contribute to industry-leading products You are equally comfortable working independently or as part of a diverse team and you re always looking for ways to improve processes and outcomes Your background in scripting languages and understanding of digital design best practices equip you to excel in a dynamic fast-paced setting Above all you are eager to make a tangible impact on next-generation semiconductor technologies while growing your career alongside some of the brightest minds in the industry What You ll Be Doing Implement RTL designs in Verilog for high-speed SERDES interfaces and IP cores Run Spyglass CDC RDC Lint and Tmax for code quality clock domain crossing and reset domain crossing checks Develop and optimize synthesis constraints to ensure robust and high-performance ASIC implementations Collaborate with experienced team members to refine digital design flows and methodologies Participate in the integration and verification of complex digital blocks within next-generation SERDES architectures Utilize scripting languages Perl Shell Python Tcl to automate design and verification tasks enhancing team efficiency Stay up to date with evolving industry standards and best practices for high-speed digital design The Impact You Will Have Advance the development of cutting-edge high-speed SERDES IP powering next-generation connectivity solutions Ensure industry-leading quality and reliability through rigorous design verification and synthesis processes Help Synopsys maintain its leadership in the semiconductor industry by contributing to critical IP used worldwide Drive innovation by identifying opportunities to optimize design flows and methodologies Support cross-functional teams by providing insights and solutions for challenging digital design problems Enhance the scalability and performance of complex ASIC designs enabling our customers success in competitive markets What You ll Need B E B Tech M Tech in Electronics Communication Engineering Electrical Engineering or related field 3 years of hands-on experience in ASIC digital design with a strong foundation in HDL coding Verilog Proficiency in synthesis constraints and basics of Static Timing Analysis STA Experience with linting and verification tools such as Spyglass CDC RDC Lint and Tmax Working knowledge of scripting languages like Perl Shell Python or Tcl for design automation Familiarity with high-speed SERDES protocols and RTL implementation is a strong advantage Who You Are Innovative thinker with a passion for technology and continuous learning Effective communicator able to share ideas and feedback constructively within a diverse team Detail-oriented and committed to delivering high-quality results Collaborative team player who thrives in a dynamic fast-paced environment Proactive problem-solver with a strong sense of ownership and accountability The Team You ll Be A Part Of You ll join a highly experienced and collaborative digital design team focused on advancing high-speed SERDES technology The team is passionate about innovation quality and continuous improvement Together you will work on challenging projects that push the boundaries of connectivity and performance learning from and supporting each other in a culture of mutual respect and shared success Rewards and Benefits We offer a comprehensive range of health wellness and financial benefits to cater to your needs Our total rewards include both monetary and non-monetary offerings Your recruiter will provide more details about the salary range and benefits during the hiring process

📌 Rtl Design- Sr Engineer (Uttar Pradesh)
🏢 Synopsys
📍 Uttar Pradesh

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