We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years in the trenches of analog design, working on circuits that move data at speeds most people cannot fathom. SerDes is not just a buzzword to you, it is the domain where you have built voltage-mode drivers, tuned PLLs until they locked cleanly, and debugged equalization schemes that looked perfect in simulation but needed three more iterations in layout. You know that a well-designed CDR is the difference between a link that works and one that fails margin at the customer site.

You do not wait for a reference design to be handed to you. When you see a spec,



you already start sketching topologies and thinking through tradeoffs between power, area, and performance. Layout is not something that happens after you finish the schematic, it is part of your design process from day one. A long metal run or poor device placement catches your eye in a floorplan review because you know exactly how it will show up in post-layout simulation.

At Synopsys, you will work on SerDes IP that ships in AI accelerators, data center switches, automotive SoCs, and consumer electronics. The circuits you design will be measured in gigabits per second, and the decisions you make will matter in millions of devices.

What You'll Be Doing

Design and optimize analog front-end building blocks for SerDes IP, including voltage and current-mode drivers, equalizers (CTLE, FFE, DFE), CDR circuits, PLLs, DLLs, VCOs, phase interpolators, bandgaps, and regulators
Run SPICE simulations across PVT corners and create verification test benches that valid

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