Bachelor's/Master's degree in Electronics, Electrical Engineering, or related field.
5+ year s of experience in emulation, RTL design, or verification.
Robust knowledge of Verilog/System Verilog.
Hands-on experience with emulation platforms such as:
Cadence Palladium
Siemens Veloce
Synopsys ZeBu
Good understanding of SoC architecture and verification methodologies.
Experience with debug tools, waveform analysis, and performance tuning.
Familiarity with interfaces/protocols like PCIe, DDR, Ethernet, AMBA (AXI/AHB/APB).
Experience with scripting languages (Python/Perl/Shell)
Location: Hyderabad
📌 96107-1 emulation (Hyderabad)
🏢 Objectwin Technology India
📍 Hyderabad
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