Job Description:
We are seeking a highly skilled Design Verification (DV) Engineer with strong expertise in core components and complex subsystems. The ideal candidate will have hands-on experience in DDRSS and Cache Controller verification, along with deep technical and debugging proficiency.
Key Responsibilities:
- Work on standard DV profiles with a focus on DDRSS.
- Contribute to the verification of core components and complex subsystems.
- Develop and execute test plans, test benches, and verification environments.
- Utilize advanced debugging techniques to identify and resolve design and verification issues.
- Collaborate with design and architecture teams to ensure comprehensive coverage and validation.
Required Skills and Experience:
- Robust experience in Cache Controller and complex subsystem verification.
- Proficiency in core and subsystem areas.
- Excellent debugging skills and problem-solving ability.
- Experience in working with standard verification methodologies (UVM/OVM/SystemVerilog) is preferred.
- Exposure to memory interfaces (DDRSS) is a must.