**Job Description Summary** The Verification and Validation Engineer ensure the verification and validation of HVDC Control Systems by creating and carrying out tests on our Controls Software to ensure that we have built the software right and that we have built the right software. **Job Description** **Essential Responsibilities** + Design and create test cases against software requirements + Carry out execution of tests and provide clear reporting of results + Clearly communicate details of failures to the respective engineering functions + Understand the key milestones in the project plan, ensure that the plan correctly provisions for the required testing activities. + Support continual improvement, raising the effectiveness and efficiency of the team through the introduction of tools, methods and process improvements and coordinating with the Continuous Improvement leaders + Support a standard product methodology mindset, seek opportunities to re-use solutions, improve quality and reliability whilst reducing the delivery timeline and associated costs **Qualifications / Essential Requirements** + Engineering degree or equivalent including power systems and power electronics subjects or proven equivalent knowledge and experience in HVDC business + Good understanding of Software Development Life Cycle especially the V-Model + Problem solving skills to support test issues especially lab setup and debugging skills + Strong sense of urgency and ability to identify and manage technical risks + Strong written and verbal communication skills + Ability to understand software requirements + Understanding of functional characteristics of power systems + Able to work to deadlines under pressure whilst maintaining the safety, quality and engineering integrity of the solution + Must be flexible with working hours **Desired characteristics:** + Agile or Scrum methodologies + Jira + Experience with test management tools + Experience with Microsoft Excel, Powerpoint, Word + Knowledge of HVDC control systems, protection and sequencing strategy + Knowledge of HVDC station equipment and interlocking design + Experience in PSCAD/RSCAD Dynamic Performance Studies + Knowledge of Line Commutation Converters (LCC) or Voltage Source Converters (VSC) + Knowledge of system tools like MATCAD, PSCAD, PSS/E, RSCAD and MATLAB etc + Knowledge of applicable electrical standards such as IEC 61850, IEC 62351, IEC 12207, IEEE 15288, IEC 25010, IEC 27032, NERC/CIP + Experience working in HVDC industry **Additional Information** **Relocation Assistance Provided:** Yes GE Vernova is an Equal Prospect Employer. Employment decisions are made without regard to race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, protected veteran status or other characteristics protected by law.

📌 Validation and Verification Engineer (Noida)
🏢 GE Vernova
📍 Noida