About Analog Devices Analog Devices Inc NASDAQ ADI is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge ADI combines analog digital and software technologies into solutions that help drive advancements in digitized factories mobility and digital healthcare combat climate change and reliably connect humans and the world With revenue of more than 9 billion in FY24 and approximately 24 000 people globally ADI ensures today s innovators stay Ahead of What s Possible TM Learn more at www analog com and on LinkedIn and Twitter X We are seeking a Staff DFT Engineer who can own and drive the complete DFT strategy for complex SoCs from architecture through production silicon This role requires deep hands-on expertise strong technical judgment and the ability to lead and mentor junior engineers while collaborating cross-functionally with design PD validation and manufacturing teams The ideal candidate operates independently makes architecture-level decisions and is accountable for test quality coverage and silicon readiness Responsibilities DFT Architecture PlanningOwn DFT architecture definition at chip and subsystem level Define scan compression LBIST MBIST boundary scan and test access strategies Drive testability requirements early in the RTL design phase Balance coverage test time power area and schedule tradeoffs DFT Implementation End-to-End Ownership Lead and execute Scan insertion stitching and DRC closure ATPG stuck-at transition path delay Test compression and pattern optimization Own DFT signoff including coverage IR drop power and timing impacts Debug and resolve DFT issues across RTL synthesis P R and gate-level stages ATPG Test QualityGenerate analyze and optimize ATPG patterns Achieve high fault coverage with minimal pattern count Review and sign off on Fault coverage reports Pattern volume and test time Diagnose coverage holes and drive design or methodology fixes Silicon Bring-Up Production SupportSupport first silicon bring-up failure analysis and yield ramp Debug scan BIST and tester-related failures Collaborate with ATE and manufacturing teams to improve yield and test robustness Drive ECOs for DFT-related silicon issues Technical Leadership MentorshipAct as DFT technical lead for one or more chips Guide and review work of junior and senior DFT engineers Define best practices checklists and reusable DFT methodologies Provide technical direction and design reviews Cross-Functional CollaborationWork closely with RTL designers Physical design PD Functional verification Product engineering and manufacturing Communicate DFT requirements and risks clearly to stakeholders Preferred Nice-to-Have Experience Experience with high-volume production test ATE bring-up and test cost optimization Exposure to safety-critical applications automotive industrial and standards e g ISO 26262 from a test reliability standpoint Experience with on-chip debug trace and design-for-debug features Scripting skills in Python Tcl Perl for DFT automation log analysis and flow integration Prior experience mentoring or leading small DFT teams or task forces Qualifications and Experience Proven experience in leading DFT teams through end-to-end SoC execution from architecture to silicon bring-up Demonstrated expertise in developing DFT architecture from scratch for complex SoC designs Solid team management and leadership experience with a track record of mentoring and growing engineering talent Bachelor s or Master s degree in Electrical Electronics Engineering or a closely related field 7 years of hands-on experience in DFT methodologies and industry-standard test techniques Deep knowledge and hands-on experience with Logic BIST LBIST Automatic Test Pattern Generation ATPG DFT Rule Checks DFT DRC Scan chain compression and stitchingLow-power DFT techniques and constraintsMemory BIST MBIST including repair mechanismsBoundary Scan IEEE 1149 1 Analog DFT strategiesJTAG architecture and TAP integrationDFT-specific STA constraints Proficient in using industry-standard DFT EDA tools including cadence Siemens Strong scripting and automation skills using Perl Tcl and or Python Solid understanding of digital design fundamentals including RTL design Lint CDC low power checks and the full ASIC design flow Excellent problem-solving skills with the ability to troubleshoot and resolve complex DFT issues efficiently Strong communication and interpersonal skills capable of working effectively in cross-functional and team-oriented environments For positions requiring access to technical data Analog Devices Inc may have to obtain export licensing approval from the U S Department of Commerce - Bureau of Industry and Security and or the U S Department of State - Directorate of Defense Trade Controls As such applicants for this position - except US Citizens US Permanent Residents and protected individuals as defined by 8 U S C 1324b a 3 - may have to go through an export licensing review process Analog Devices is an equal opportunity employer We foster a culture where everyone has an opportunity to succeed regardless of their race color religion age ancestry national origin social or ethnic origin sex sexual orientation gender gender identity gender expression marital status pregnancy parental status disability medical condition genetic information military or veteran status union membership and political affiliation or any other legally protected group Job Req Type Experienced Required Travel Yes 10 of the time Shift Type 1st Shift Days

📌 Staff Dft Engineer (Karnataka)
🏢 Analog Devices
📍 Karnataka