- You will be part of the team that develops and deploys fully automated CAD flows to validate Foundational IPs quality, improve design time and efficiency.
- Use Perl, Python, Cadence SKILL and mainly JAVA, C++ to automate design flow and report generation.
- A component of your work will include working with EDA infrastructure and data such as EDA tools, version control systems, Memory/CPU cycle/license consumption etc.
- Work with cross-geo, cross-functional teams to understand automation requirements and communicate resolution in a timely manner.
Required Qualifications :
- MS/MTech +internship is preferred Specialization on Microelectronics/VLSI or related fields
- Good knowledge of industry standard EDA tools and flows for VLSI designs.
- Masters in software development in EDA/VLSI design domain.
- Must have experience with Unix setting.
- Must have hands-on experience with JAVA, C++ based Software development.
- Desired experience with scripting in Python/Perl/Tcl/Shell for design automation support.
- Must have good technical verbal and written communication skills and ability to work with cross functional teams is necessary.
- Should be self-driven, liking for coding/ software development, excellent problem-solving skills, written & oral communication skills.
- Familiarity with standard software development practices like Version Control systems, Code documentation, Bug management and Regression process.
- Language Fluency - Fluent in English Language - written & verbal.
- Must be a team player with a can-do attitude, act in a responsible manner and support all Environmental, Health, Safety & Security requirements, and programs.
Preferred Qualifications:
- Experience with PowerBI, Excel, Powerpoint and other office productivity tools.
- Cliosoft/Dassault for design flow management.