We are looking for an experienced Principal Engineer Systems Validation to join our Systems Validation team and drive system-level validation of next-generation FPGA products, interfaces, and architecture features.
Key Responsibilities:
- Lead system-level validation of FPGA architectures and interfaces.
- Develop FPGA/system designs to emulate real-world customer applications and use cases.
- Create and execute validation and emulation plans; analyze and communicate results.
- Perform FPGA prototyping, silicon validation, failure analysis, and debug.
- Develop and maintain RTL code in Verilog/VHDL and embedded software in C/C
- Collaborate with cross-functional teams to ensure product quality and performance.
Required Skills & Experience:
- 9 years of experience in FPGA design, system validation, or silicon validation.
- Robust RTL design and verification expertise in Verilog and VHDL
- Hands-on experience with ModelSim/QuestaSim and Synplicity
- Knowledge of ARM Cortex-M/RISC processors and AMBA protocols (APB, AHB, AXI, ACE).
- Strong board-level debug skills using oscilloscopes, logic analyzers, and protocol analyzers.
- Experience with FPGA prototyping, emulation, and system debug.
Domain Expertise (One or More):
Memory Interfaces:
- DDR4/LPDDR4, DDR5/LPDDR5
- DDR controllers and training algorithms
- I2C/I3C protocols