Location: Location: Bengaluru/Bhubaneswar/Ranchi

Experience: 5 - 7 Years

Technical Requirements:

- Digital Logic Design: Robust expertise in digital logic design with hands-on

experience in RTL coding using Verilog and SystemVerilog.

- Peripheral Design: Experience in designing high-speed and low-speed peripherals.

- Design Optimization: Understanding of synthesis, timing constraints, clock domain

crossing (CDC), and logic optimization techniques.

- Low Power Design: Exposure to low power design techniques, including working

with multiple power and clock domains will be advantage.

- Protocol Knowledge: knowledge of protocols such as PCIe, DDRx, Ethernet, USB,

AXI, AHB, APB, I2C, and SPI will be preferred.

Expectations from the Role:

- Communication & Independence: Excellent communication and interpersonal skills,

with the ability to work independently.

- Adaptability: A fast learner who can efficiently operate in a distributed work

environment.

- Initiative & Punctuality: Demonstrates ownership, initiative, and punctuality in all

responsibilities.

📌 Functional Verification Engineer (India)
🏢 ARF DESIGN
📍 India