We are seeking a skilled
Hardware Emulation Engineer
with hands-on experience in
Synopsys HAPS-based prototyping
and
emulation platforms
. The candidate will be responsible for building, debugging, and validating complex SoC and ASIC designs on FPGA-based emulation environments to accelerate pre-silicon verification and software validation.
Key Responsibilities
Develop, integrate, and maintain
FPGA-based emulation platforms
(Synopsys HAPS, Palladium, or equivalent).
Convert RTL designs into emulation-ready models, including partitioning and synthesis for multi-FPGA platforms.
Perform design bring-up, debug, and hardware/software co-validation using
JTAG, logic analyzers, and waveform viewers
.
Collaborate with design, verification, and firmware teams to enable
early software execution and system performance analysis
.
Support automation of build flows, configuration management, and regression testing for emulation platforms.
Analyze timing, resource utilization,



and performance metrics to optimize emulation efficiency.
Document flows, best practices, and debug methodologies for team knowledge sharing.
Required Skills & Experience
5+ years
of experience in
FPGA prototyping or hardware emulation
of complex SoCs/ASICs.
Hands-on experience with
Synopsys HAPS
platforms (HAPS- series preferred).
Solid proficiency in
Verilog/SystemVerilog
,
FPGA synthesis
, and
place-and-route tools
(Synplify Pro, Vivado, or Quartus).
Familiarity with
UVM verification
,
hardware/software co-simulation
, and
embedded firmware bring-up
.
Proficient in
debug tools
(Identify, Verdi, DVE, or similar).
Scripting knowledge:
Tcl, Python, Shell
for automation.
Positive understanding of
SoC architectures
,
AXI/AHB/PCIe interfaces
, and
clock/reset domains
.

📌 Fpga Emulation Engineer Bengaluru (India)
🏢 Fpga
📍 India