- Development of key building blocks of memory architecture such as Row Decoder, IO, Control.
- Skilled in pitched layout concepts, floor planning for Placement, Power and Global Routing.
- Knowledge of EM/IR requirements. Compiler level integration, verification of Compiler/Custom memories.
- Should possess positive knowledge on CMOS fabrication process, foundries and challenges in latest technology nodes
Experience (years) : 3-6 years
Education Qualification:
BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent