* Responsible for design and development of FPGA RTL with Verilog/VHDL
*To Analyse domain specific technical or low level requirement and modification as per end customer or system requirement.
* Participate in high level requirements analysis, High level and low level RTL design
* Perform testing including unit and functional testing
* Troubleshoots FPGA design problems which are complex in nature.
* Documenting technical deliverable like FPGA design specifications, design document, code commenting and unit test cases, Release note etc. throughout the project life cycle.
* Follow defined process for FPGA Development life cycle
*Develop recent approaches to complex design problems.
Location:
IN-MH-Pune, India-Magarpatta City-Unit B (eInfochips)
Time Type:
Full time
Job Category:
Engineering Services
📌 Engineer - FPGA (Pune)
🏢 Arrow
📍 Pune
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