05 Aug
|
NXP Semiconductors
|
Noida
05 Aug
NXP Semiconductors
Noida
Senior Digital backend engineer
Experience: Not Available to Not Available years
Location: Noida, India
Skills: RTL synthesis, GDS implementation, timing convergence, STA, design ECO, physical verification, DRC, LVS, Electromigration, IR drops
Generic Job Description (not Job Level specific)
The Digital Physical Design Engineer / Architect is responsible for a physical implementation of IP, Subsystem or IC design. The individual is responsible from RTL synthesis to GDS implementation and optimization of design including floorplanning, routing, timing convergence (STA) including related design ECO and physical verification for fulfilling all Technology & reliability related rules, such as DRC/LVS/Electromigration/IR drops. The individual contributes to problem solving related to physical design. Contributes to define best Physical design strategy per technology node. More information about NXP in India... #LI-2734
📌 Senior Digital backend engineer (Noida)
🏢 NXP Semiconductors
📍 Noida