Position: ASIC Design Verification Engineer – PCIE High Speed

Location: Bangalore (In office)

Experience: 8 to 12 Years

Open Positions: 10

Job Type: Full time

Notice Period: Immediate to 30 Days preferred

Key Responsibilities:
Verify IPs, subsystems, and SoCs for high-performance computing systems.
Perform block-level and system-level verification using SystemVerilog and UVM.
Develop test plans, write and execute test cases, and debug failures.
Work closely with design and architecture teams to ensure robust verification coverage.

Required Skills:
Strong hands-on experience in SystemVerilog and UVM methodology.
Experience in verifying PCI Express (PCIE) or other high-speed protocols.
Proficiency in object-oriented programming and scripting languages like Python or Perl.
Positive understanding of low-level programming concepts and verification flows.
Familiarity with PC system architecture including:
PCI Express
USB
Ethernet
HyperTransport
DDR

📌 Asic Design Verification Engineer – Pcie High Speed Bengaluru
🏢 Tuitions Tree
📍 Bengaluru